Interconnect design with VLSI CMOS
نویسنده
چکیده
Historically, high-performance logic circuit interchip design has focused on bipolar emitter-coupled logic (ECL) circuits and signals, but VLSl CMOS has attained performance levels at which problems unique to its characteristics must be addressed for design optimization. In this paper, CMOS interchip circuit models are applied to develop packaging and wiring constraints for synchronous communication.
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عنوان ژورنال:
- IBM Journal of Research and Development
دوره 39 شماره
صفحات -
تاریخ انتشار 1995